For example, minimizing the number of PCB layers while shortening the traces as much as possible, placing decoupling capacitors close to some specific components, placing components based on thermal dissipation or mechanical requirements, placing components to prevent interfering signals (cross talking and noise), defining best component placement based on parasitic estimate or extraction (for high frequency PCB layout), placing components to facilitate trace equalization (for DDR or Serdes systems) and much more. Many constraints can be met simultaneously.

PCB Smart Place and Router achieves this in a few customizable phases: reading a netlist and placing the components, finding the best component placement to allow wiring with minimum number of layers, determining the best configuration to untangle the component connections as much as possible rotating the components for better wiring and finally packing the components to condense the whole circuit in the smallest PCB area possible. Once all these tasks are completed the placement and routing of the whole circuit can be transferred to any other PCB design platform.